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Georgia Institute of Technology

School of Electrical and Computer Engineering

Cadence University Program Member

Cadence Tools in the ECE Curriculum

Cadence software is being used primarily in the following courses in the School of Electrical and Computer Engineering at Georgia Tech:

  • ECE 3041 and ECE 3042 use version 9.2 of Cadence/Orcadlite/PSpice for basic instruction in SPICE
  • ECE 3060, VLSI and Advanced Digital Design, is a junior level course which includes a treatment of custom and semi-custom design. Students use Composer and Virtuoso to design a small computing system.
  • ECE 6130/4130 uses Cadence tools to teach the students practical layout and design techniques. The students follow the whole design path from a given circuit (e.g., an FPGA) specification, to individual block designs, to layout in commercial digital processes (e.g., 180nm, 130nm or 90nm) which may then be considered for fabrication (e.g., via MOSIS). The students compare logical effort design results with the circuits simulated from the schematics, and then back compare the extracted results from the layout to demonstrate how things are not as ideal as one has been taught.
  • Cadence is used for design projects in the graduate course “Wireless IC Design” (ECE6420). Standard device models are used in conjunction with Spectre and SpectreRF simulation in Cadence to design circuits for Ultra Wide-Band (UWB) applications. Baseband and time-domain simulations of analog front-ends and back-end circuits are performed.

Cadence Tools in ECE Research Projects

Cadence software is being used in many research projects in the School of Electrical and Computer Engineering. They include the following, wide-ranging initiatives.
  • The Microsystems Packaging Research Center is designing and building prototypes, which demonstrate next generation packaging technology developed at the center.
  • DARPA-funded research on tools for mixed-signal test is being developed in collaboration with Cadence, Boeing, IMS, and the University of Washington.
  • Integrated systems for segmented locomotion are being built in the Neuromorphic Systems Laboratory, with funding from the National Science Foundation.
  • The Cooperative Analog and Digital Signal Processing (CADSP) laboratory has used the Cadence tools for an intelligent audio processing project funded by National Semiconductor. Their goal is to create a low-power analog front-end that triggers a more complicated Digital Signal Processing system. They used Cadence to simulate the individual components (filters, zero-crossings detector, and classification circuit) and the complete system. This work required them to use audio files as stimuli to analog circuits in Cadence. As a result, they created a MATLAB function, wav2cadence, that converts a sound file into a SPICE piece-wise-linear-source (PWLS) that can be included in a Cadence spectreS simulation, (simply by including the file under the "Environments" tab and rebuilding the netlist). They also used the ocean feature to communicate with MATLAB such that they could automatically adjust simulation parameters with a MATLAB script.
  • The Microwave Applications Group (MAG) has used Cadence for the design of electronic dispersion compensators. Specifically, they design electronic compensators for high-speed optical data links.  Cadence is the main tool to predict performance of electronic circuits. In addition, they are in process of integrating Cadence with systems modeling tools. Currently, time impaired time-domain signals are used as input signals into Cadence. MAG personnel hope to automate this process in the near future, so they will be able to predict performance from a top-down systems perspective. This will enable them to optimize amplitude noise limited optical systems with jitter limited electronic devices.
  • The Microwave Applications Group (MAG) has used Cadence for the implementation of digital and analog block in RF systems. They use Cadence to design digital circuits and analog circuits. The design procedure consists of a schematic design, simulation, and layout drawing. For simulation design, they use the Cadence-Composer tool. For simulation, they use the PDK tool embedded in the Cadence tool. They also use the Virtuoso tool for drawing the layout.
  • The Microwave Applications Group (MAG) has also used Cadence for integrated circuit development for gigabit wireless applications. They use Cadence for the 60 GHz gigabit wireless project. The specific uses are as follows:
    • Development of CMOS fully integrated 60GHz multi-gigabit radio chips using CMOS 90nm process
    • Development of CMOS multi-gigabit radio Analog Signal Processor using RF library and custom model
    • Development of CMOS multi-gigabit Digital Signal Processing
    • Using Digital library
    Simulations are performed using Spectre and SpectreRF simulators in Cadence with embedded PDKs, and layouts are performed using the Virtuoso tool.
  • The Georgia Tech Analog, Power, & Energy ICs Lab uses the Cadence tools for the simulation, layout, and verification of integrated circuits (ICs) designed, developed, built, and evaluated for the purpose of furthering their research in the field of analog, power, and energy ICs. The files generated from the Cadence environment are used to submit IC prototypes to foundries like those supported by MOSIS.
  • Dr. Cressler uses Cadence in his research team as the standard platform for IC design in SiGe technology.
  • The Georgia Electronic Design Center (GEDC) supports world-class research that fosters the development and design of new communications technology in wireless/RF, wired/copper and fiber channel applications.

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Disclaimer

Information is provided "as is" without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.


Cadence is a trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.

Questions about this page? Please contact david.schimmel@ece.gatech.edu.

Last revised on May 14, 2008.

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